Parallel processing on VLSI arrays / International symposium on circuits and systems (ISCAS) (May 1990; New Orleans) (1991)

Public ISBD Titre : Parallel processing on VLSI arrays Type de document : texte imprimé Auteurs : Josef A. Nossek, Éditeur scientifique Congrès : International symposium on circuits and systems (ISCAS) (May 1990; New Orleans), Auteur Editeur : Boston : Kluwer academic publishers Année de publication : 1991 Collection : Journal of VLSI signal processing num. Vol. 3, nos. 1-2 (1991) Importance : 140 p. Présentation : ill. Format : 27 cm ISBN/ISSN/EAN : 978-0-7923-9200-2 Note générale : La p. de titre porte en plus: "A Special issue of Journal of VLSI signal processing." Langues : Anglais (eng) Mots-clés : Parallel processing (Electronic computers) Integrated circuits -- Very large scale integration Index. décimale : 621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs Résumé : Parallel processing on VLSI arrays is an edited volume of original research. This work is comprised of eight invited contributions based on novel work that was presented at a special session at the international symposium on circuits and systems held in New Orleans in May 1990. This research work has also been published as a special issue of the journal of VLSI signal processing (Volume 3, Issue 1/2). Massive parallelism to cope with high-speed requirements stemming from real-time applications and the restrictions in architectural and circuit design, such as regularity and local connectedness, brought about by the VLSI technology are the key questions addressed in these contributions. Note de contenu : Contents: * Numerical Integration of Partial Differential Equations Using Principles of Multidimensional Wave Digital Filters. * Signal Processing Using Cellular Neural Networks. * Nonlinear Analog Networks for Image Smoothing and Segmentation. * A Systolic Array for Nonlinear Adaptive Filtering and Pattern Recognition. * Control Generation in the Design of Processor Arrays. * A Sorter-Based Architecture for a Parallel Implementation of Communication Intensive Algorithms. * Feedforward Architectures for Parallel Viterbi Decoding. * Carry-Save Architectures for High-Speed Digital Signal Processing. Parallel processing on VLSI arrays [texte imprimé] / Josef A. Nossek, Éditeur scientifique / International symposium on circuits and systems (ISCAS) (May 1990; New Orleans), Auteur . - Boston : Kluwer academic publishers, 1991 . - 140 p. : ill. ; 27 cm. - (Journal of VLSI signal processing; Vol. 3, nos. 1-2 (1991)) . ISBN : 978-0-7923-9200-2 La p. de titre porte en plus: "A Special issue of Journal of VLSI signal processing." Langues : Anglais (eng) Mots-clés : Parallel processing (Electronic computers) Integrated circuits -- Very large scale integration Index. décimale : 621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs Résumé : Parallel processing on VLSI arrays is an edited volume of original research. This work is comprised of eight invited contributions based on novel work that was presented at a special session at the international symposium on circuits and systems held in New Orleans in May 1990. This research work has also been published as a special issue of the journal of VLSI signal processing (Volume 3, Issue 1/2). Massive parallelism to cope with high-speed requirements stemming from real-time applications and the restrictions in architectural and circuit design, such as regularity and local connectedness, brought about by the VLSI technology are the key questions addressed in these contributions. Note de contenu : Contents: * Numerical Integration of Partial Differential Equations Using Principles of Multidimensional Wave Digital Filters. * Signal Processing Using Cellular Neural Networks. * Nonlinear Analog Networks for Image Smoothing and Segmentation. * A Systolic Array for Nonlinear Adaptive Filtering and Pattern Recognition. * Control Generation in the Design of Processor Arrays. * A Sorter-Based Architecture for a Parallel Implementation of Communication Intensive Algorithms. * Feedforward Architectures for Parallel Viterbi Decoding. * Carry-Save Architectures for High-Speed Digital Signal Processing.

Réservation

Réserver ce document

Exemplaires (1)

Code-barres	Cote	Support	Localisation	Section	Disponibilité	Etat_Exemplaire
041611	621.382 INT	Papier	Bibliothèque Centrale	Electronique	Disponible	En bon état