| Titre : | Closing the power gap between ASIC & custom |
| Auteurs : | Chinnery, David, Auteur ; Keutzer, Kurt William, Auteur |
| Type de document : | document électronique |
| Editeur : | Berlin ; London ; New York : Springer, 2007 |
| ISBN/ISSN/EAN : | 978-0-387-68953-1 |
| Langues : | Anglais |
| Index. décimale : | 621.381 |
| Tags : | Circuits intégrés Circuits imprimés -- Conception et construction -- Informatique |
| Résumé : |
This document carefully details design tools and techniques for realizing low power and energy efficiency in a highly productive design methodology.
Important topics include: - Microarchitectural techniques to reduce energy per operation - Power reduction with timing slack from pipelining - Analysis of the benefits of using multiple supply and threshold voltages - Placement techniques for multiple supply voltages - Verification for multiple voltage domains - Improved algorithms for gate sizing, and assignment of supply and threshold voltages - Power gating design automation to reduce leakage - Relationships among statistical timing, power analysis, and parametric yield optimization Design examples illustrate that these techniques can improve energy efficiency by two to three times. |
Exemplaires (2)
| Cote | Support | Localisation | Section | Disponibilité | Etat_Exemplaire |
|---|---|---|---|---|---|
| 621.381 CHI | Ressources électroniques | Bibliothèque Centrale | Electronique | Disponible | |
| 621.381 CHI | Ressources électroniques | Bibliothèque Centrale | Electronique | Disponible |
