Titre : |
Algorithmic and register-transfer level synthesis : the system architect's workbench |
Type de document : |
texte imprimé |
Auteurs : |
D. E. Thomas, Auteur ; E. D. Lagnese, Auteur ; R. A. Walker, Auteur ; J. A. Nestor, Auteur |
Editeur : |
Boston : Kluwer academic publishers |
Année de publication : |
1990 |
Collection : |
The kluwer international series in engineering and computer science |
Sous-collection : |
VLSI, computer architecture and digital signal processing num. 85 |
Importance : |
IX-305 p. |
Présentation : |
ill. |
Format : |
24 cm |
ISBN/ISSN/EAN : |
978-0-7923-9053-4 |
Note générale : |
Bibliogr. p. [281]-296. Index |
Langues : |
Anglais (eng) |
Mots-clés : |
Integrated circuits -- Design and construction
Computer architecture
Circuits intégrés -- Conception et construction |
Index. décimale : |
621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs |
Résumé : |
Algorithmic and register-transfer level synthesis: the system architect's workbench presents the results of several coordinated research projects, collectively referred to as the system architect's workbench. The research described here can be grouped into three major categories:
1- computer-aided design tools to support algorithmic level synthesis.
2- computer-aided design tools to support register-transfer level synthesis.
3- computer-aided design tools to support the visualization of an automatically designed system in terms of its original behavioral description. |
Note de contenu : |
Contents:
* Design representations and synthesis.
* Transformations.
* Architectural partitioning (APARTY).
* Control step scheduling (CSTEP).
* Data path allocation (EMUCS).
* Microprocessor synthesis (SUGAR).
* Synthesis results.
* Correlating the multilevel design representation (CORAL).
* Observations and future work. |