Unified methods for VLSI simulation and test generation / Ting-Kwang Cheng (1989)

Public ISBD Titre : Unified methods for VLSI simulation and test generation Type de document : texte imprimé Auteurs : Ting-Kwang Cheng, Auteur ; Vishwani D. Agrawal, Auteur Editeur : Boston : Kluwer academic publishers Année de publication : 1989 Autre Editeur : Norwell [États-Unis] : AT&T bell laboratories Collection : The kluwer international series in engineering and computer science Sous-collection : VLSI, computer architecture and digital signal processing num. 73 Importance : XII-148 p. Présentation : ill. Format : 24 cm ISBN/ISSN/EAN : 978-0-7923-9025-1 Note générale : Bibliogr. p. [113]-143. Index Langues : Anglais (eng) Mots-clés : Integrated circuits -- Very large scale integration -- Computer-aided design Integrated circuits -- Very large scale integration -- Testing Integrated circuits -- Very large scale integration -- Computer simulation Index. décimale : 621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs Résumé : In ensuring the quality of a VLSI device, the verification of design and testing of the product are two of the most important steps. Unified methods for VLSI simulation and test generation combines the two steps in one CAD tool. Building on the power of event-driven logic simulation and concurent fault simulation, the authors develop a directed-search methodology for the generation of production tests. Note de contenu : Contents: * Logic simulation and fault analysis. * The generation approaches. * Simulation-based directed-search approach. * Threshold-value simulation. * Test generation using threshold-value simulation. * Test generation in concurrent fault simulator. Unified methods for VLSI simulation and test generation [texte imprimé] / Ting-Kwang Cheng, Auteur ; Vishwani D. Agrawal, Auteur . - Boston : Kluwer academic publishers : Norwell [États-Unis] : AT&T bell laboratories, 1989 . - XII-148 p. : ill. ; 24 cm. - (The kluwer international series in engineering and computer science. VLSI, computer architecture and digital signal processing; 73) . ISBN : 978-0-7923-9025-1 Bibliogr. p. [113]-143. Index Langues : Anglais (eng) Mots-clés : Integrated circuits -- Very large scale integration -- Computer-aided design Integrated circuits -- Very large scale integration -- Testing Integrated circuits -- Very large scale integration -- Computer simulation Index. décimale : 621.382 Dispositifs électroniques utilisant les effets des corps solides. Dispositifs semi-conducteurs Résumé : In ensuring the quality of a VLSI device, the verification of design and testing of the product are two of the most important steps. Unified methods for VLSI simulation and test generation combines the two steps in one CAD tool. Building on the power of event-driven logic simulation and concurent fault simulation, the authors develop a directed-search methodology for the generation of production tests. Note de contenu : Contents: * Logic simulation and fault analysis. * The generation approaches. * Simulation-based directed-search approach. * Threshold-value simulation. * Test generation using threshold-value simulation. * Test generation in concurrent fault simulator.

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